Semiconductor Packaging University Program – Edition 2021-2022
Together with the HAN University of Applied Sciences, CITC offers a Semiconductor Packaging University Program tailored to the specific needs of companies involved. This course, with a duration of about 5 months, enables students and company employees to get training in all relevant aspects in the field of packaging, both theoretical and practical. The second edition starts first week of September 2021.
Learn more about integrated chip technology and its applications
In the Semiconductor Packaging program you will get acquainted with the semiconductor industry and delve into the final step of chip manufacturing, the phase in which the chip is ‘packaged’ in its housing. Packaging is becoming more and more complex and multidisciplinary. Developments such as system-on-chip, embedded cameras, 5G, sensors and micro-electro-mechanical systems (MEMS) place high demands on the manufacturing process and the competencies of affected employees. Packages are becoming more complicated and application specific, while costs must be kept low.
This education program focuses on the design and manufacturing of semiconductor packages and the associated assembly, reliability and test techniques. It includes a practical assignment that will be carried out on the premises of either a Semiconductor company or CITC. The program is developed through collaboration between HAN University of Applied Sciences, CITC and its partners NXP, Nexperia, Ampleon, TU Delft and TNO.
The program is offered:
- As a course for professionals working or interested in the semiconductor industry, that want to expand or deepen their knowledge of semiconductor assembly and packaging.
- As a minor for bachelor students Electrical and Electronic Engineering, Applied Physics, Chemistry, Mechanical Engineering, Automotive Engineering, or Industrial Engineering & Management, that want to broaden their horizon into the field of semiconductor assembly and packaging.
Opening video of the first edition
In October 2020 RN7 and Omroep Gelderland published a news item about HAN & CITC’s new Semiconductor Packaging course. Read more and watch the video for the interview with Joop Bruines, Program Coordinator and Gwen Visser, Student.
Details of the second edition
- Location – CITC, Novio Tech Campus, Transistorweg 5, Nijmegen, The Netherlands
- Language – English
- (Expected) start date – First week of September 2021, likely Monday August 30th 2021
- Format – Offline and Online for the theoretical lessons/ Offline for the practical part
- Study load – ± 20-24 hours per week (lectures + self-study)
- Study format – Part-time (about 5 Months)
- Costs – Three options:
1) As stand-alone course theoretical lessons only: € 2.750,- excl. VAT (VAT is not applicable for private participants)
2) As stand-alone course, theoretical lessons and practical part: € 3.750,- excl. VAT (VAT is not applicable for private participants)
3) As part of a bachelor program: go to www.han.nl/kosten
Excluding about €200,- in study material for all options
Minor for students
In the Semiconductor Packaging minor you delve into the world of semiconductors and chip packaging such as for embedded cameras and sensors. Topics of the minor are:
- Semiconductors and Semiconductor Packaging Fundamentals
- Advanced Applications, Materials and Packaging Techniques
- Basic Package Simulations, Device Testing and Data Analysis
- Design Quality and Reliability, Industrialization and Economics
It is a block minor; offered once a year as a block in the 1st semester. It concerns a differentiation exchange course; the minor enables you to develop your professional competences in a different/ broader context. The study format is either full-time or part-time, 1 semester. As a diploma you get a certificate or it is part of your bachelor degree. The title and level are Bachelor – University of Applied Sciences.
Weblinks for student participation
Program and content
The theoretical lessons take place on Mondays from 12:30 to 21:00 hrs. (Central European Time) with several small breaks and a short dinner pause. Topics are:
– Semiconductor Front-End Introduction
– Semiconductor Back-End Introduction
– Application Areas & Requirements, Advanced Packaging Technologies
– Packaging of Integrated Photonics Introduction, Reliability
– Thermal & Mechanical Simulations
– Advanced Materials Introduction, Quality
– Semiconductor Testing, Trends in Semiconductor Packaging
The practical lessons will be scheduled later on.
The education program is supported by
Read more in the Semiconductor Packaging University Program brochure