Semiconductor packaging News

Semiconductor Packaging University Program

September 4 2020 – Together with the HAN University of Applied Sciences, CITC developed a Semiconductor Packaging module tailored to the specific needs of the companies involved. This part-time course, with a duration of 5 months, enables both students and company employees to get training in all the aspects that are relevant in the field of packaging, both theoretical and practical. The course includes a practical assignment that will be carried out on the premises of either a Semiconductor company or CITC. The course starts September 28 2020.

Semiconductor Packaging module

Learn more about integrated chip technology and its applications with focus on the design and manufacturing of semiconductor packages and the associated assembly techniques.
In the Semiconductor Packaging module you will get acquainted with the semiconductor industry and delve into the final step of chip manufacturing, the phase in which the chip is ‘packaged’ in its housing. Packaging is becoming more and more involved. Developments such as system-on-chip, embedded cameras, RF, sensors and Micro Electro Mechanical Systems (MEMS) place high demands on the manufacturing process and the competencies of affected employees. Packages are becoming more complex and more customer-specific, while their serial size decreases. This module focuses on the design and manufacturing of semiconductor packages and the associated assembly techniques. The module was developed through collaboration between HAN University of Applied Sciences, CITC and its partners NXP, Nexperia, Ampleon, TU Delft and TNO.

Further details of this first edition
Scope – Theoretical lessons and practical part or Theoretical lessons only
Costs – Euro 3.750,- excl. VAT* (Euro 2.750,- excl. VAT* for the Theoretical lessons only)
Format – Offline and Online
Language – English
Class location – CITC building, Novio Tech Campus, Transistorweg 5 in Nijmegen, The Netherlands. Room 0.32**
Study format – Part-time (about 5 Months)
Study load – ± 20-24 hours per week (lectures + self-study)
Level – University of Applied Sciences
Diploma – Certificate

*  VAT not applicable for private participants
** Due to Corona there can be only be 9 participants on-site at the venue. We will record the sessions and make them available for simultaneous participation via an on-line video conferencing tool and for reviewing at a later time.

Program and content
The theoretical lessons take place on the following days from 12:30 to 21:00 hrs. (Central European Time) with several small breaks and a short dinner pause
– week 40, September 28: Welcome, Semiconductor Front-End Introduction
– week 41, October 5: Semiconductor Back-End Introduction
– week 42, October 12: Application Areas & Requirements; Advanced Packaging Technologies
– week 44, October 26: Packaging of Integrated Photonics Introduction; Reliability part-1
– week 45, November 2: Reliability part-2, Thermal & Mechanical Simulations part-1
– week 46, November 9: Thermal & Mechanical Simulations part-2, Advanced Materials Introduction, Quality
– week 47, November 16: Semiconductor Testing, Trends in Semiconductor Packaging
The practical lessons will be scheduled later on.

Read more in the Semiconductor Packaging University Program brochure or have a look at the HAN website.

Interested in joining this course? Please contact us for more information or to recieve the registration form.